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Automotive Ethernet Testing & Measurement Techniques

Non-Intrusive PAM3 Automotive Ethernet Measurement and Protocol Decode Techniques

Join us for this Measurement Experts webinar where Tektronix expert, Darshan Mehta will cover everything you need to know about the new methods for advancing PAM3 testing to make your job much easier.

March 25, 2020 @ 2:00 PM ET (11:00 AM PT)

Today’s PAM3 test methods rely on inefficient methods to derive signal quality that don’t provide enough accuracy to be 100% confident in your designs. New methods for advancing PAM3 testing using signal separation provide improved protocol decode, signal quality testing and PAM3 analysis that make your job much easier.

This webinar will cover the effect these new methods have on:
• Visibility of actual data between ECU#1 and ECU#2 without disturbing the cable layout
• Automotive ethernet signal integrity (eye opening, jitter, BER) when operating in full duplex mode
• Using eye diagrams for Open Alliance Signal Quality Test rather than relying on SQI values
• Signal quality during cranking, switching on DC motor, and other auto operations

You will come away with an understanding of how to accelerate your designs and development, while reducing testing costs, and you’ll receive a preview of the new automotive signal separation solution from Tektronix.

More about "Automotive Ethernet Testing & Measurement Techniques" & FAQ

How much does this Automotive Ethernet Testing Measurement Techniques training cost?

This training is 100% free!

I'm not sure I can join March 25 at 2:00 PM ET. Should I still register?

ABSOLUTELY. By registering you will automatically receive the recording of the live webinar session and additional educational materials and freebies (such as posters!).

About the Presenter

Darshan Mehta

Darshan Mehta, Product Manager, Automotive Segment

Darshan Mehta is a Product Manager with Tektronix Automotive Solutions Group. He holds a master’s degree in VLSI Design and has over 18 years of experience in test and measurement, EDA design and VLSI design. Darshan has experience in pre-silicon and post-silicon validation for high-speed standards, signal integrity and EMI-EMC.

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